Architecture and Programming model of 8086

Architecture and Programming model of 8086 Intel 8086 is a 16 bit integer processor. It has a 16-bit Data bus and a 20-bit Address bus. Since 20-bit address lines are available that provide up to 1MB of storage. It consists of a powerful instruction set which makes it possible to carry out different operations easily.It supports 2 modes of operation, Maximum (multiple processors can be used) and Minimum (Single processor is used).Architecture of 8086 The internal architecture of 8086 is divided into 2 units, Bus Interface Unit (BIU) and Execution Unit (EU).A diagram of the architecture is shown below.Bus Interface Unit (BIU)BIU takes care of all data and address transfers on the buses for the EU like sending addresses, fetching instructions from the memory, reading data from ports, writing data into the memory ports and lastly it also generates the memory addresses. The EU and the BIU are connected by the Internal Bus.The BIU has the following functional parts: Instruction Queue- the BIU uses the concept of pipelining. This means while the current instruction is being executed the BIU gets up to 6 bytes of the next instruction (prefetching) and stores them in the instruction queue. Once execution is complete, the instruction queue is ready to provide the next instruction set which is simply read and executed. This results in increased execution speed. Instruction Pointer- It is a 16-bit register used to hold the address of the next instruction to be executed. Segment Register BIU has 4 segment buses, i.e. CS, DS, SS ES. It holds the addresses of instructions and data in memory, which are used by the processor to access memory locations. CS It stands for Code Segment. It is used for addressing a memory location in the code segment of the memory, where the executable program is stored. DS It stands for Data Segment. It consists of data used by the program and is accessed in the data segment by an offset address or the content of other register that holds the offset address. SS It stands for Stack Segment. It handles memory to store data and addresses during execution. ES It stands for Extra Segment. ES is additional data segment, which is used by the string to hold the extra destination data. Execution Unit (EU)EU gives instructions to BIU stating from where to fetch data, decode it and finally execute it. Its function is to control operations on data using the instruction decoder and ALU (Arithmetic Logic Unit). The data on which the operations are performed is brought in using the BIU.The EU has the following functional parts: ALU- It handles all arithmetic and logic operations, like +, -, Ãâ€", /, OR, AND NOT. Flag Register- It is a 16-bit register that behaves like a flip-flop, i.e. it changes its status according to the result stored in the accumulator. It has 9 flags and they are divided into 2 groups Conditional Flags and Control Flags. Conditional Flags It represents the result of the last arithmetic or logic instruction executed. These flags are listed below: Carry Flag- This flag is set to ‘1’ when an addition causes a carry or a subtraction causes a borrow. Auxiliary Flag- This flag is set to ‘1’ when an addition causes a carry while moving from a lower nibble to the upper nibble in BCD addition. Parity Flag- This flag is set to ‘1’ if the low order 8 bits of the result contain an even number of ‘1’s. Zero Flag- This flag is set to 1 when the result of arithmetic or logical operation is zero. Sign Flag- This flag holds the sign of the result, i.e. when the result of the operation is negative, then the sign flag is set to 1 else set to 0. Overflow Flag- This is set to ‘1’ if the result is out of range or when the system capacity has exceeded. Conditional Flags These control the operations of the EU and can also be used by the user. These flags are listed below: Trap flag It is used for single step control and allows the user to execute one instruction at a time for debugging. If it is set, then the program can be run in a single step mode. Interrupt flag It is an interrupt enable/disable flag, i.e. used to allow/prohibit the interruption of a program. It is set to 1 for interrupt enabled condition and set to 0 for interrupt disabled condition. Direction flag It is used in string operation. As the name suggests when it is set then string bytes are accessed from the higher memory address to the lower memory address and vice-a-versa. General purpose register- There are 8 general purpose registers, i.e., AH, AL, BH, BL, CH, CL, DH, and DL. These registers can be used individually to store 8-bit data and can be used in pairs to store 16-bit data. The valid register pairs are AH and AL, BH and BL, CH and CL, and DH and DL. It is referred to the AX, BX, CX, and DX respectively. Their functionalities are listed below: AX register- It is also known as accumulator register. It is used to store operands for arithmetic operations. BX register- It is used as a base register. It is used to store the starting base address of the memory area within the data segment. CX register- It is referred to as counter. It is used in loop instruction to store the loop counter. DX register- This register is used to hold I/O port address for I/O instruction. Stack Pointer Register- It is a 16-bit register which holds the address from the start of the segment to the memory location, where a word was most recently stored on the stack.